Verification of Convolution Relation Between Sensitized Path’s Gate Transients, Power Grid Impulse Responses and Power Port Transients

In this paper we provide further evidence and verify the existence of convolution relation between transient currents of gates of a sensitized path, power grid impulse responses and transient currents measured from chip power ports. Such a relation has important implications and applications in different aspects of current based testing and diagnosis techniques. We have also developed a new tool for extraction of sensitized path’s circuit model from chips SPICE model. Our simulation results shows that using the new flow for path extraction will improve the accuracy and generates waveforms that are closer to full chip SPICE simulation.